1. Field of Invention
The invention relates to a method for fabricating a semiconductor device and, in particular, to a method for fabricating a semiconductor device that uses the technique of ion implantation to modulate the stress in the silicon nitride film in the semiconductor device.
2. Related Art
For a P-type metal oxide semiconductor field effect transistor (PMOSFET) and N-type metal oxide semiconductor field effect transistor (NMOSFET), they require different stresses to improve the carrier mobility in the channel region. In particular, the PMOSFET requires a compressive stress in the channel region, while the NMOSFET requires a tensile stress.
Since the stress value and type of a silicon nitride film deposited in one piece at a time are fixed, one could only select one of the PMOSFET and NMOSFET on a wafer to improve its performance by imposing a specific type of stress. That is, the prior art can only improve the performance of a single type of devices, but not both PMOS and NMOS FET's.
There are many solutions of using the technique of ion implantation to improve the stress in the silicon nitride layer. For example, U.S. Pat. No. 5,633,202 discloses a high tensile nitride layer. A doped oxide is first grown above the semiconductor device with silicide contacts. In particular, boron doped oxide is used for the PMOSFET and phosphorous doped oxide is used for the NMOSFET. Afterwards, a nitride layer is covered thereon, followed by the deposition of an interlayer dielectric.
A. Shimizu, K. Hachimine et al. implants Ge into the silicon nitride film to release the stress in a certain region. To improve the PMOSFET performance, a silicon nitride film with high compressive stress is deposited on the transistor as a cap layer. To avoid affecting the performance of the NMOS devices, Ge implantation on the silicon nitride film above the NMOS region of the same substrate is employed to release its stress. The opposite method is used if one wants to improve the NMOS devices.
It is important to provide a high stress film having different stress values in different regions for improving different types of devices. However, the prior art does not provide a satisfactory solution. Since CMOS FET's have both PMOS and NMOS devices at the same time, it is imperative to find a method for fabricating a semiconductor device with the desired properties.